Meet the team

The Strathclyde SDR Lab is supported by a team of 2 Academic staff,
6 Knowledge Exchange, 3 R&D Engineers and 11 PhD Students.

Prof Bob Stewart

5G Director (Academic)
Bob Stewart is a professor of signal processing at the University of Strathclyde. He manages a research group working on DSP, FPGAs, whitespace radio, and low-cost SDR implementation.

Dr Louise Crockett

RFSoC SDR (Academic)
Louise Crockett is a Senior Teaching Fellow at the University of Strathclyde. She has core research interests in the hardware implementation of Digital Signal Processing (DSP) systems, in particular for communications and SDR, and is the principal author of “The Zynq Book”.

Dr David Crawford

5G Technology Director (KE)
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Malcolm Brew

Principal 5G Engineer (KE)
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Ivan Marjanovic

5G Projects Manager (KE)
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Dr Douglas Allan

5G Hardware Engineer (R&D)
Douglas is a research associate in the UoS 5G cluster. He is involved in 5G network design and installation and implementation of physical layer processing for the RFSoC.

Dani Anderson

5G Hardware Engineer (KE)
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Dr Kenny Barlee

5G SDR and RAN Engineer (KE)
Kenny is mobile network engineer developing innovative new RAN solutions. Currently working on the design and implementation of a new 5G NSA/SA network for the 5G NewThinking project, that will be used for fixed wireless access broadband and neutral host cellular services.

David Northcote

FPGA Systems Designer (R&D)
David is a DSP and FPGA design engineer for wireless communication applications. He specialises in developing systems using the Xilinx RFSoC device.

Shawn Kalade

AI Communications Engineer (R&D)
Shawn is a PhD student at the University of Strathclyde 5G cluster, researching Deep Learning techniques for Wireless Communications, specifically at the radio physical layer. He enjoys long walks on the beach and differentiable functions.

Tawachi Nyasulu

(PhD Researcher 2016-20)
Tawachi is a PhD candidate at University of Strathclyde. Her research focus is on affordable rural internet and dynamic spectrum management; and is currently researching on RF environment modelling and radio resource allocation algorithms for dynamic spectrum access networks.

Craig Ramsay

(PhD Researcher 2017-22)
Craig is a PhD student at the University of Strathclyde researching functional programming techniques for hardware description, with a focus on dependent types and DSP applications. Craig’s cat is a contributing author of the Exploring Zynq MPSoC Book — and Craig is also a co-author.

Josh Goldsmith

(PhD Researcher 2017-21)
Josh is a PhD student at the University of Strathclyde where his research focus is on run-time reconfigurable hardware design, specifically for FPGA-based radio applications. In 2019 he completed a six month internship with Xilinx, developing hardware systems and training material for the RFSoC within the PYNQ team. He was also lead engineer for Project: Sandstorm in 2018.

Damien Muir

(PhD Researcher 2017-20)
Damien is a PhD candidate at the University of Strathclyde. They are currently researching RF Compression techniques for higher fibre throughput, higher capacity, and for storage purposes. They enjoy the odd mint viscount.

Shruthi K.A.

(PhD Researcher 2017-20)
Shruthi is a PhD student at University of Strathclyde. Her research focuses on techno-economic analysis and game theory modelling of 5G networks for rural mobile connectivity in Scotland. She have also been working on a field work with International Institute of Information Technology (IIIT) Hyderabad for over an year to analyse the feasibility of 5G in rural India.

Andrew Maclellan

(PhD Researcher 2018-22)
Andrew is a PhD candidate at the University of Strathclyde researching deep learning for PHY layer wireless communications with a focus on inference on FPGAs/SoCs.

Lewis McLaughlin

(PhD Researcher 2018-22)
Lewis is a PhD student at the University of Strathclyde exploring the effectiveness of overlay methodologies, implemented using Pynq, within the context of Software Defined Radio (SDR) and Xilinx’ new Radio Frequency System on Chip (RFSoC).

Blair McTaggart

(PhD Researcher 2018-22)
Blair is a PhD student at the University of Strathclyde. His research involves designing an efficient FPGA implementation of a multi-element adaptive beamformer, based on the QR Decomposition algorithm.

Ehinomen Atimati

(PhD Researcher 2019-22)
Atimati is a PhD student at University of Strathclyde, whose research is on spectrum management automation in a shared environment for affordable broadband delivery.

Marius Šiaučiulis

(PhD Researcher 2019-23)
Marius is a PhD student at the University of Strathclyde. His research is focused on FPGA accelerated software defined radio development for modern cellular network applications.

Dennis Sonoiya

(PhD Researcher 2019-22)
Dennis is a